pciconfig_read, pciconfig_write, pciconfig_iobase \- pci device information handling
.SHSYNOPSIS
.nf
.B#include<pci.h>
.sp
.BI"int pciconfig_read(unsigned long "bus", unsigned long "dfn,
.BI" unsigned long "off", unsigned long "len", void *"buf);
.BI"int pciconfig_write(unsigned long "bus", unsigned long "dfn,
.BI" unsigned long "off", unsigned long "len", void *"buf);
.BI"int pciconfig_iobase(long "which", unsigned long "bus,
.BI" unsigned long "devfn);
.fi
.SHDESCRIPTION
.TP
Most of the interaction with PCI devices is already handled by the kernel PCI layer, and thus these calls should not normally need to be accessed from userspace.
.TP
.BRpciconfig_read
Reads to
.I
buf
from device
.I
dev
at offset
.I
off
value.
.TP
.BRpciconfig_write
Writes from
.I
buf
to device
.I
dev
at offset
.I
off
value.
.TP
.BRpciconfig_iobase
You pass it a bus/devfn pair and get a physical address for either the memory offset (for things like prep, this is 0xc0000000), the IO base for PIO cycles, or the ISA holes if any.