47 lines
2.0 KiB
HTML
47 lines
2.0 KiB
HTML
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
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<HTML>
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<META NAME="GENERATOR" CONTENT="SGML-Tools 1.0.9">
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<TITLE>Brief Introduction to Alpha Systems and Processors: The chip-sets </TITLE>
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<LINK HREF="Alpha-HOWTO-7.html" REL=next>
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<LINK HREF="Alpha-HOWTO-5.html" REL=previous>
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<LINK HREF="Alpha-HOWTO.html#toc6" REL=contents>
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<A HREF="Alpha-HOWTO-7.html">Next</A>
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<A HREF="Alpha-HOWTO.html#toc6">Contents</A>
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<HR>
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<H2><A NAME="The chip-sets"></A> <A NAME="s6">6. The chip-sets </A></H2>
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<P> DS sells two CPU support chipsets. The 2107x chipset (aka APECS) is a
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21064(A) support chiset. The 2117x chipset (aka ALCOR) is a 21164 support
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chipset. There will also be 2117xA chipset (aka ALCOR 2) as a 21164A support
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chipset.
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<P>
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<P> Both chipsets provide memory controllers and PCI host bridges for their
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CPU. APECS provides a 32-bit PCI host bridge, ALCOR provides a 64-bit PCI host
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bridge which (in accordance with the requirements of the PCI spec) can support
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both 32-bit and 64-bit PCI devices.
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<P>
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<P>APECS consists of 6, 208-pin chips (4, 32-bit data slices (DECADE), 1
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system controller (COMANCHE), 1 PCI controller (EPIC)). It provides a DRAM
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controller (128-bit memory bus) and a PCI interface. It also does all the work
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to maintain memory coherence when a PCI device DMAs into (or out of) memory.
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<P>
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<P> ALCOR consists of 5 chips (4, 64-bit data slices (Data Switch, DSW) -
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208-pin PQFP and 1 control (Control, I/O Address, CIA) - a 383 pin plastic PGA).
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It provides a DRAM controller (256-bit memory bus) and a PCI interface. It
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also does all the work required to support an external Bcache and to
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maintain memory coherence when a PCI device DMAs into (or out of) memory.
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<P>
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<P> There is no support chipset for the 21066, since the memory controller and
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PCI host bridge functionality are integrated onto the chip.
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<P>
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