mirror of https://github.com/mkerrisk/man-pages
prctl.2: Minor wording fixes
Signed-off-by: Michael Kerrisk <mtk.manpages@gmail.com>
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Michael Kerrisk
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101
man2/prctl.2
101
man2/prctl.2
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@ -263,27 +263,29 @@ or
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Return the endian-ness of the calling process,
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in the location pointed to by
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.IR "(int\ *) arg2" .
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.\" 9791554b45a2acc28247f66a5fd5bbc212a6b8c8
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.TP
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.BR PR_SET_FP_MODE " (since Linux 4.0, only on MIPS)"
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On MIPS, user land code can be built using ABI which permits linking
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with a code with a more restrictive floating point requirements.
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For example, user land code may be built to target the O32 FPXX ABI
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.\" commit 9791554b45a2acc28247f66a5fd5bbc212a6b8c8
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On the MIPS architecture,
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user-space code can be built using an ABI which permits linking
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with code that has more restrictive floating-point (FP) requirements.
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For example, user-space code may be built to target the O32 FPXX ABI
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and linked with code built for either one of the more restrictive
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FP32 or FP64.
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FP32 or FP64 ABIs.
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When more restrictive code is linked in,
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the overall requirement for the process is to use this more
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restrictive floating point mode.
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Since kernel has no means of knowing in advance
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which mode process should be executed in,
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and having possibility that these restrictions can
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be changed during the process' lifetime,
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the ability to control it from the user space via this option is provided.
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the overall requirement for the process is to use the more
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restrictive floating-point mode.
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Since the kernel has no means of knowing in advance
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which mode the process should be executed in,
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and having the possibility that these restrictions can
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be changed during the process's lifetime,
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the ability to control it from user space via this option is provided.
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.\" https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
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The
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.I (unsigned int) arg2
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argument is a bit mask describing floating point mode used:
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argument is a bit mask describing the floating-point mode used:
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.RS
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.TP
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.BR PR_FP_MODE_FR " = " "(1 << 0)"
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@ -294,52 +296,54 @@ When this bit is
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mode), 32 FP registers are 32-bit wide,
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and 64-bit registers are represented as pair of registers
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(even- and odd- numbered,
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with even-numbered register containing lower 32 bits,
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and odd-numbered register containing higher 32 bits).
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with the even-numbered register containing the lower 32 bits,
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and the odd-numbered register containing the higher 32 bits).
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When this bit is
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.I set
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(on supported hardware), 32 FP registers are 64-bit wide (so called
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.BR FR=1 " or " FR1
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mode)
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mode).
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Note that modern MIPS implementations (MIPS R6 and newer) support
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.B FR=1
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mode only.
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Applications that use O32 FP32 ABI can operate only when this bit is
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Applications that use the O32 FP32 ABI can operate only when this bit is
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.I unset
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.RB ( FR=0 ;
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or they can be used with FRE enabled, see below).
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Applications that use O32 FP64 ABI (and O32 FP64A ABI, which exists for
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providing ability to operate with existing FP32 code; see below) can operate
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only when this bit is
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Applications that use the O32 FP64 ABI
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(and the O32 FP64A ABI, which exists to
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provide the ability to operate with existing FP32 code; see below)
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can operate only when this bit is
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.I set
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.RB ( FR=1 ).
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Applications that use O32 FPXX ABI can operate in both cases.
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Applications that use the O32 FPXX ABI can operate in both cases.
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.TP
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.BR PR_FP_MODE_FRE " = " "(1 << 1)"
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Compatibility with 32-bit FP mode.
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When this mode is enabled,
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it emulates 32-bit FP operations by raising reserved instruction exception
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it emulates 32-bit FP operations by raising a reserved-instruction exception
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on every instruction that uses 32-bit formats and
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kernel then handles the instruction in software
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(the problem lies in discrepancy of handling odd-numbered registers
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which are high 32 bits of 64-bit registers with even numbers in
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the kernel then handles the instruction in software.
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(The problem lies in the discrepancy of handling odd-numbered registers
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which are the high 32 bits of 64-bit registers with even numbers in
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.B FR=0
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mode and lower 32-bit parts of odd-numbered 64-bit registers in
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mode and the lower 32-bit parts of odd-numbered 64-bit registers in
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.B FR=1
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mode).
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Enabling of this bit is needed when code with O32 FP32 ABI should operate
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with code with compatible O32 FPXX or O32 FP64A ABIs (which require
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mode.)
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Enabling this bit is necessary when code with the O32 FP32 ABI should operate
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with code with compatible the O32 FPXX or O32 FP64A ABIs (which require
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.B FR=1
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FPU mode) or when it is executed on newer hardware (MIPS R6 onwards)
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which lacks
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.B FR=0
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mode support when binary with FP32 ABI is used.
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mode support when a binary with the FP32 ABI is used.
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.IP
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Note that this mode only makes sense when FPU is in 64-bit mode
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.RB ( FR=1 .)
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Note that this mode makes sense only when the FPU is in 64-bit mode
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.RB ( FR=1 ).
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.IP
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Note that usage of emulation inherently has a significant performance hit
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Note that the use of emulation inherently has a significant performance hit
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and should be avoided if possible.
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.RE
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.IP
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@ -348,24 +352,33 @@ does not need FPU emulation and always operates in
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.B FR=1
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mode.
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.IP
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This option is mainly intended for use by dynamic loader,
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but may be of use by applications in case library loading
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during runtime (via
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This option is mainly intended for use by the dynamic loader,
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but may be of use in applications that perform library loading
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at run time (via
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.BR dlopen (3),
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for example) is used.
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for example).
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.IP
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Arguments
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.IR arg3 ", " arg4 " and " arg5
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The arguments
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.IR arg3 ,
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.IR arg4 ,
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and
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.IR arg5
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are ignored.
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.TP
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.BR PR_GET_FP_MODE " (since Linux 4.0, only on MIPS)"
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Get current floating point mode (see description for
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Get the current floating-point mode (see the description of
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.B PR_SET_FP_MODE
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for details).
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Call returns bit mask which represents current FP mode in case of success.
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Arguments
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.IR arg2 ", " arg3 ", " arg4 " and " arg5
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On success,
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the call returns a bit mask which represents the current FP mode.
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The arguments
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.IR arg2 ,
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.IR arg3 ,
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.IR arg4 ,
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and
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.IR arg5
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are ignored.
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.TP
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.BR PR_SET_FPEMU " (since Linux 2.4.18, 2.5.9, only on ia64)"
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@ -1395,7 +1408,7 @@ is
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.B PR_SET_FP_MODE
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and
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.I arg2
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has invalid or unsupported value.
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has an invalid or unsupported value.
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.TP
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.B EPERM
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.I option
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