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syscall.2: Rework table to render within 80 columns 

Signed-off-by: Michael Kerrisk <mtk.manpages@gmail.com>
This commit is contained in:
Michael Kerrisk 2019-01-10 06:06:20 +13:00
parent 03936fb4ce
commit 7548a84a6c
1 changed files with 16 additions and 15 deletions
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31
man2/syscall.2
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@ -178,32 +178,33 @@ and the register used to signal an error.
.ft CW
\}
.TS
l2 l2 l2 l2 l2 l2 l.
arch/ABI instruction syscall # retval retval2 error Notes
l2 l2 l2 l2 l1 l2 l.
arch/ABI instruction system ret ret error Notes
call # val val2
_
alpha callsys v0 v0 a4 a3 [1], [6]
alpha callsys v0 v0 a4 a3 1, 6
arc trap0 r8 r0 - -
arm/OABI swi NR - a1 - - [2]
arm/OABI swi NR - a1 - - 2
arm/EABI swi 0x0 r7 r0 r1 -
arm64 svc #0 x8 x0 x1 -
blackfin excpt 0x0 P0 R0 - -
i386 int $0x80 eax eax edx -
ia64 break 0x100000 r15 r8 r9 r10 [1], [6]
ia64 break 0x100000 r15 r8 r9 r10 1, 6
m68k trap #0 d0 d0 - -
microblaze brki r14,8 r12 r3 - -
mips syscall v0 v0 v1 a3 [1], [6]
mips syscall v0 v0 v1 a3 1, 6
nios2 trap r2 r2 - r7
parisc ble 0x100(%sr2, %r0) r20 r28 - -
powerpc sc r0 r3 - r0 [1]
powerpc sc r0 r3 - r0 1
riscv scall a7 a0 a1 -
s390 svc 0 r1 r2 r3 - [3]
s390x svc 0 r1 r2 r3 - [3]
superh trap #0x17 r3 r0 r1 - [4], [6]
sparc/32 t 0x10 g1 o0 o1 psr/csr [1], [6]
sparc/64 t 0x6d g1 o0 o1 psr/csr [1], [6]
tile swint1 R10 R00 - R01 [1]
x86-64 syscall rax rax rdx - [5]
x32 syscall rax rax rdx - [5]
s390 svc 0 r1 r2 r3 - 3
s390x svc 0 r1 r2 r3 - 3
superh trap #0x17 r3 r0 r1 - 4, 6
sparc/32 t 0x10 g1 o0 o1 psr/csr 1, 6
sparc/64 t 0x6d g1 o0 o1 psr/csr 1, 6
tile swint1 R10 R00 - R01 1
x86-64 syscall rax rax rdx - 5
x32 syscall rax rax rdx - 5
xtensa syscall a2 a2 - -
.TE
.PP