mirror of https://github.com/mkerrisk/man-pages
getauxval.3: ffix
Signed-off-by: Michael Kerrisk <mtk.manpages@gmail.com>
This commit is contained in:
parent
be2e899b49
commit
618b1e7eca
|
@ -134,19 +134,22 @@ the cache is N-way set associative.
|
|||
The L1 data cache size.
|
||||
.TP
|
||||
.BR AT_L1I_CACHEGEOMETRY
|
||||
Geometry of the L1 instruction cache, encoded as for AT_L1D_CACHEGEOMETRY.
|
||||
Geometry of the L1 instruction cache, encoded as for
|
||||
.BR AT_L1D_CACHEGEOMETRY .
|
||||
.TP
|
||||
.BR AT_L1I_CACHESIZE
|
||||
The L1 instruction cache size.
|
||||
.TP
|
||||
.BR AT_L2_CACHEGEOMETRY
|
||||
Geometry of the L2 cache, encoded as for AT_L1D_CACHEGEOMETRY.
|
||||
Geometry of the L2 cache, encoded as for
|
||||
.BR AT_L1D_CACHEGEOMETRY .
|
||||
.TP
|
||||
.BR AT_L2_CACHESIZE
|
||||
The L2 cache size.
|
||||
.TP
|
||||
.BR AT_L3_CACHEGEOMETRY
|
||||
Geometry of the L3 cache, encoded as for AT_L1D_CACHEGEOMETRY.
|
||||
Geometry of the L3 cache, encoded as for
|
||||
.BR AT_L1D_CACHEGEOMETRY .
|
||||
.TP
|
||||
.BR AT_L3_CACHESIZE
|
||||
The L3 cache size.
|
||||
|
|
Loading…
Reference in New Issue