If you want to contribute to this HOWTO, I would prefer a diff against the SGML version.
If you send me an email about this HOWTO, please include a
tag like <tt>[Linux SMP HOWTO]</> in the <tt>Subject:</> field of your
e-mail. It helps me to automatically sort mails (and you will have a faster
reply <tt>;)</>).
<p>
This HOWTO is an improvement of a <url name="first draft"
url="http://www.ihoc.net/linux-smp-faq-draft.html"> made by <bf>Chris
Pirih</bf> and maintained by <bf>David Mentre</bf>.
<p>
All information contained in this HOWTO is provided "as is." All
warranties, expressed, implied or statutory, concerning the accuracy of
the information of the suitability for any particular use are hereby
specifically disclaimed. While every effort has been taken to ensure the
accuracy of the information contained in this HOWTO, the authors assume
no responsibility for errors or omissions, or for damages resulting from
the use of the information contained herein.
<sect>Questions related to any architectures
<p>
<sect1>Kernel Side
<p>
<p>
<enum>
<item> <bf>Does Linux support multi-threading? If I start two or more
processes, will they be distributed among the available CPUs?</bf>
<p>
Yes. Processes and kernel-threads are distributed among processors.
User-space threads are not.
<item> <bf>What kind of architectures are supported in SMP?</bf>
<p>
<descrip>
<tag/From <bf>Alan Cox</bf>:/
<p>
SMP is supported in 2.0 on the hypersparc (SS20, etc.) systems and Intel
486, Pentium or higher machines which are Intel MP1.1/1.4
compliant. <bf>Richard Jelinek</bf> adds: right now, systems have been
tested up to 4 CPUs and the MP standard (and so Linux) theoretically
allows up to 16 CPUs.
<p>
SMP support for UltraSparc, SparcServer, Alpha and PowerPC machines is
in available in 2.2.x.
<p>
<tag/From <bf>Ralf B<>chle</bf>:/ MIPS, m68k and ARM does not
support SMP; the latter two probly won't ever.
<p>
That is, I'm going to hack on MIPS-SMP as soon as I get a SMP box ...
</descrip>
<item> <bf>Does SMP distribute the threads among the processors or is the library the one in charge of it?</bf>
<p>
(<bf>Matti Aarnio</bf>) The way Linux implements threads is to treat them at scheduling the same way as any process - thread just happens to share several resources of the originating process; memory space, file descriptors. See clone(2) for part of explanation.
<item> <bf>How do I make a Linux SMP kernel?</bf>
<p>
Most Linux distributions don't provide a ready-made SMP-aware kernel,
which means that you'll have to make one yourself. If you haven't made
your own kernel yet, this is a great reason to learn how. Explaining
how to make a new kernel is beyond the scope of this document; refer to
the Linux Kernel Howto for more information. (<bf>C. Polisher</bf>)
<p>
Configure the kernel and answer Y to CONFIG_SMP.
<p>
If you are using LILO, it is handy to have both SMP and non-SMP
kernel images on hand. Edit /etc/lilo.conf to create an entry
for another kernel image called "linux-smp" or something.
<p>
The next time you compile the kernel, when running a SMP kernel,
edit linux/Makefile and change "MAKE=make" to "MAKE=make -jN"
(where N = number of CPU + 1, or if you have tons of memory/swap
you can just use "-j" without a number). Feel free to experiment
with this one.
<p>
Of course you should time how long each build takes :-)
Example:
<code>
make config
time -v sh -c 'make dep ; make clean install modules modules_install'
</code>
<p>
If you are using some Compaq MP compliant machines you will need to set
the operating system in the BIOS settings to "Unix
<p>
In kernel series 2.0 up to but not including 2.1.132, uncomment the
<tt/SMP=1/ line in the main Makefile (<tt>/usr/src/linux/Makefile</>).
<p>
In the 2.2 version, configure the kernel and answer "yes" to the
question "Symmetric multi-processing support" (<bf>Michael Elizabeth
Chastain</bf>).
AND
enable real time clock support by configuring the "RTC support" item (in
"Character Devices" menu) (from <bf>Robert G. Brown</bf>). Note that
inserting RTC support actually doesn't afaik prevent the known problem
with SMP clock drift, but enabling this feature prevents lockup when the
clock is read at boot time. A note from <bf>Richard Jelinek</bf> says
also that activating the Enhanced RTC is necessary to get the second CPU
working (identified) on some original Intel Mainboards.
AND
(x86 kernel) do NOT enable APM (advanced power management)! APM and SMP
are not compatible, and your
system will almost certainly (or at least probably <tt>;)</>) crash
while booting if APM is enabled (<bf>Jakob Oestergaard</bf>). <bf>Alan
Cox</bf> confirms this : 2.1.x turns APM off for SMP boxes. Basically
APM is undefined in the presence of SMP systems, and anything could
occur.
AND
(x86 kernel) enable "MTRR (Memory Type Range Register) support". Some
BIOS are buggy as they do not activate cache memory for the second
processor. The MTRR support contains code that solves such processor
misconfiguration.
<p>
You must rebuild all your kernel and kernel modules when changing to and
from SMP mode. Remember to <tt>make modules</> and <tt>make
modules_install</> (from <bf>Alan Cox</bf>).
<p>
If you get module load errors, you probably did not rebuild and/or
re-install your modules. Also with some 2.2.x kernels people have
reported problems when changing the compile from SMP back to UP
(uni-processor). To fix this, save your .config file, do <em>make
mrproper</em>, restore your <em>.config</em> file, then remake your
kernel (<em>make dep</em>, etc.) (<bf>Wade Hampton</bf>). Do not forget
to run lilo after copying your new kernel.
<p>
Recap:
<code>
make config # or menuconfig or xconfig
make dep
make clean
make bzImage # or whatever you want
# copy the kernel image manually then RUN LILO
# or make lilo
make modules
make modules_install
</code>
<p>
<item> <bf>How do I make a Linux <bf>non</bf>-SMP kernel?</bf>
<p>
In the 2.0 series, <bf>comment</bf> the <tt/SMP=1/ line in the main
Makefile (/usr/src/linux/Makefile).
<p>
In the 2.2 series, configure the kernel and answer "no" to the question
"Symmetric multi-processing support" (<bf>Michael Elizabeth
Chastain</bf>).
<p>
You must rebuild all your kernel and kernel modules when changing to and
from SMP mode. Remember to <tt>make modules</> and <tt>make
modules_install</> and remember to run lilo. See notes above about
possible configuration problems.
<item> <bf>How can I tell if it worked?</bf>
<p>
<verb> cat /proc/cpuinfo </verb>
<p>
Typical output (dual PentiumII):
<code>
processor : 0
cpu : 686
model : 3
vendor_id : GenuineIntel
[...]
bogomips : 267.06
processor : 1
cpu : 686
model : 3
vendor_id : GenuineIntel
[...]
bogomips : 267.06
</code>
<item> <bf>What is the status of converting the kernel toward finer
grained locking and multithreading?</bf>
<p>
Linux kernel version 2.2 has signal handling, interrupts and some I/O stuff fine grain
locked. The rest is gradually migrating. All the scheduling is SMP
safe.
<p>
Kernel version 2.3 (next 2.4) has really fine grained locking. In the 2.3 kernels
the usage of the big kernel lock has basically disappeared, all major
Linux kernel subsystems are fully threaded: networking, VFS, VM, IO,
block/page caches, scheduling, interrupts, signals, etc. (<bf>Ingo
Molnar</bf>)
<item> <bf>What has changed between 2.2.x and 2.4.x kernels?</bf>
<p>
<bf>(Mark Hahn)</bf> In many parts of the kernel, there's little relation between 2.2 and 2.4. One of the biggest changes is SMP - not just the evolutionary fine-graining of locks, but the radically revamped VM, memory management, interrupt handling that's basically unrelated to 2.2, fairly revolutionary net changes (thread and zero-copy), etc.
<p>
In short, 2.2 doesn't use the hardware like 2.4 does.
<item> <bf>Does Linux SMP support processor affinity?</bf>
<p>
<descrip>
<tag/Standard kernel/
No and Yes. There is no way to force a process onto specific CPU's but
the linux scheduler has a processor bias for each process, which tends
to keep processes tied to a specific CPU.
<tag/Patch/
Yes. Look at <url name="PSET - Processor Sets for the Linux kernel"
url="http://isunix.it.ilstu.edu/~thockin/pset/">:
<quote>
The goal of this project is to make a source compatible and functionally
equivalent version of pset (as defined by SGI - partially removed from
their IRIX 6.4 kernel) for Linux. This enables users to determine which
processor or set of processors a process may run on. Possible uses
include forcing threads to separate processors, timings, security (a
`root' only CPU?) and probably more.
</quote>
It is focused around the syscall sysmp(). This function takes a number of
parameters that determine which function is requested. Functions
include:
<itemize>
<item> binding a process/thread to a specific CPU
<item> restricting a CPU's ability to execute some processes
<item> restricting a CPU from running at all
<item> forcing a cpu to run _only_ one process (and its children)
<item> getting information about a CPU's state
<item> creating/destroying sets of processors, to which processes may be
bound
</itemize>
</descrip>
<item> <bf>Where should one report SMP bugs to?</bf>
<p>
Please report bugs to <tt>linux-smp@vger.kernel.org</>.
<item> <bf>What about SMP performance?</bf>
<p>
If you want to gauge the performance of your SMP system, you can run some tests made by
url="http://nemo.physics.ncsu.edu/~briggs/gimp/index.html"> for more
info.
</descrip>
</enum>
<sect1>MultiProcessor Specification Support (MPS)
<p>
(<bf>Randy Dunlap</bf>) Linux supports MPS (MP spec.) version 1.1 and 1.4.
<p>
Linux doesn't have full support for all of MPS version 1.4.
<p>
Experience has shown that Linux usually works best when the BIOS is configure for MP Spec. version 1.1 if that is an option in your system's BIOS. I don't see why the MP Spec. version should matter to Linux, but it would be an interesting exercise to find out the differences as presented by BIOS tables, to determine why Linux fails with MP Spec. version 1.4 in some cases, and to fix Linux so that this wouldn't matter.
<p>
This document summarizes the major changes in MP spec. version 1.4 and their support status in Linux.
<p>
<sect2> Symmetric I/O Mode
<p>
The hardware must support a mode of operation in which the system can switch easily to Symmetric I/O mode from PIC or Virtual Wire mode. When the operating system is ready to swtich to MP operation, it writes a 01H to the IMCR register, if that register is implemented, and enables I/O APIC Redirection Table entries. The hardware must not require any other action on the part of software to make the transition to Symmetric I/O mode.
<p>
Linux recognizes and supports this MP configuration mode.
<p>
<sect2> Floating Point Exception Interrupt
<p>
For PC/AT compatibility, the bootstrap processor must support DOS-compatible FPU execution and exception handling while running in either of the PC/AT-compatible modes. This means that floating point error signals from the BSP must be routed to the interrupt request 13 signal, IRQ13, when the system is in PIC or virtual wire mode. While floating point error signals from an application processor need not be routed to IRQ13, platform designers may choose to connect the two. For example, connecting the floating point error signal from application processors to IRQ13 can be useful in the case of a platform that supports dynamic choice of BSP during boot.
<p>
In symmetric mode, a compliant system supports only on-chip floating point units, with error signaling via interrupt vector 16. Operating systems must use interrupt vector 16 to manage floating point exceptions when the system is in symmetric mode.
<p>
Linux does not use the floating point interrupt at all except in genuine i386 processor systems which are not SMP-capable. [In these systems, if they wire the FPU exception line in the PC/AT-compatible way, a run-time check for #MF exception availability is performed. If the #MF exception is available, then Linux handles this interrupt if it happens. (<bf>Maciej W. Rozycki</bf>)
<p>
<sect2> Multiple I/O APIC Configurations
<p>
Multiple I/O APICs are supported in Linux.
<p>
<sect2> MP Configuration Table
<p>
This table was made optional in MPS version 1.4. If the table isn't present, one of the default configurations should be used. An extended section was also added to it for new table entry types.
<p>
Linux supports the optional MP Configuration Table and uses a default configuration if the MP Config. Table is not present.
<p>
Linux tolerates extended section table entries by skipping over them if they are found. Data in the extended table entries is not used.
<p>
<sect2> MP Configuration Table Header Fields
<p>
New or changed fields for MP Spec. version 1.4:
<p>
<itemize>
<item> OEM Table Pointer: supported in Linux
<item> Extended Table Length: supported (tolerated, skipped) in Linux
<item> Extended Table Checksum: supported (tolerated, skipped) in Linux
</itemize>
<p>
<sect2> Extended MP Configuration Table Entries
<p>
Entry types for System Address Space Mapping, Bus Hierarchy Descriptor, and Compatibility Bus Address Space Modifier are defined.
<p>
Linux skips over (does not use) these extended MP Configuration table entries. Apparently this isn't critical to any shipping systems.
<sect>x86 architecture specific questions
<p>
<sect1>Why it doesn't work on my machine?
<p>
<enum>
<item> <bf>Can I use my Cyrix/AMD/non-Intel CPU in SMP?</bf>
<p>
Yes. Current AMD Athlon MP processors support SMP with the AMD 760MP chipset. There are several boards available featuring this chipset, e.g. from Tyan, ASUS, etc. Athlon/SMP is supported by recent 2.4.x kernels and also by the latest 2.2.x kernels. (<bf>David Haring</bf>)
(F7 I think) for a configuration option "APIC mode" and set this to
"full Table mode". This is an official Compaq
recommandation. (<bf>Daniel Roesen</bf>)
<p>
(<bf>Adrian Portelli</bf>)To do this:
<enum>
<item> Press F10 when the server boots to enter the System Configuration Utility
<item> Press Enter to dismiss the splash screen
<item> Immediately press CTRL+A
<item> A message will appear informing you that you are now in "Advanced Mode"
<item> Then select "Configure Hardware" -> "View / Edit details"
<item> You will then see the advanced settings (intermixed with the ordinary ones)
<item> Stroll down to "APIC Mode" and then select "Fully Mapped"
<item> Save changes and reboot
</enum>
<item> <bf>I can't get my Compaq SystemPro work in SMP mode.</bf>
<p>
(<bf>Maciej W. Rozycki</bf>) Chances are that your Compaq do not make use of 82489DX APICs as they were introduced quite late -- in late 1992 or early 1993. There used to be i486 machines that implemented the APIC architecture. 82489DX is the chip that was used for them and it contained a local APIC unit and an I/O APIC unit.
<item> <bf>Why doesnt my ALR work?</bf>
<p>
From <bf>Robert Hyatt</bf> : ALR Revolution quad-6 seems quite safe,
while some older revolution quad machines without P6 processors seem
"iffy"...
<item> <bf>Why does SMP go so slowly?</bf> or <bf>Why does one CPU show
a very low bogomips value while the first one is normal?</bf>
<p>
From <bf>Alan Cox</bf>: If one of your CPU's is reporting a very low
bogomips value the cache is not enabled on it. Your vendor probably
provides a buggy BIOS. Get the patch to work around this or better yet
send it back and buy a board from a competent supplier.
<p>
A 2.0 kernel (> 2.0.36) contains the MTRR patch which should solve this
problem (select option "Handle buggy SMP BIOSes with bad MTRR setup" in
the "General setup" menu).
<p>
I think buggy SMP BIOS handling is automatic in latest 2.2 kernels.
<item> <bf>I've heard IBM machines have problems</bf>
<p>
Some IBM machines have the MP1.4 bios block in the EBDA, allowed but not
supported below 2.2 kernels.
There is an old 486SLC based IBM SMP box. Linux/SMP requires hardware
FPU support.
<item> <bf>Is there any advantage of Intel MP 1.4 over 1.1 specification?</bf>
<p>
Nope (according to Alan <tt/:)/ ), 1.4 is just a stricker specs of 1.1.
<p>
Please see the <url name="Useful Pointers" url="SMP-HOWTO-8.html"> for comparison between MP 1.4 and 1.1.
<item> <bf>Why does the clock drift so rapidly when I run linux SMP?</bf>
<p>
This is known problem with IRQ handling and long kernel locks in
the 2.0 series kernels. Consider upgrading to a later 2.2 kernel.
<p>
From <bf>Jakob Oestergaard</bf>: Or, consider running xntpd. That should
keep your clock right on time. (I think that I've heard that enabling
RTC in the kernel also fixes the clock drift. It works for me! but I'm
not sure whether that's general or I'm just being lucky)
<p>
There are some kernel fixes in the later 2.2.x series that may
fix this.
<p>
<item> <bf>Why are my CPU's numbered 0 and 2 instead of 0 and 1 (or some other odd
numbering)?</bf>
<p>
The CPU number is assigned by the MB manufacturer and doesn't mean
anything. Ignore it.
<item> <bf>My quad-Xeon system hangs as soon as it has decompressed the
kernel</bf>
<p>
(<bf>Doug Ledford</bf>) Try recompiling LILO with LARGE_EBDA support
and then making sure to always use make bzImage when compiling the
kernel. That appears to have fixed the SMP boot hangs here on Intel
multi-Xeon boards. However, please note that this also appears to break
LILO in that the root= option no longer works, so make sure you rdev
your kernel image at the same time you run lilo to make sure that the
kernel loads the correct root filesystem at boot.
<p>
(<bf>Robert M. Hyatt</bf>) With 3 cpus, do you have a terminator in the
4th slot?
<item> <bf>During boot machine hang signaling an "unexpected IO-APIC" warning</bf>
<p>
<bf>Short Answer:</bf> Change your MP setting from 1.4 to 1.1 (BIOS option), and boot with "noapic" option at boot prompt.
<bf>Long Answer:</bf> This message has nothing to do with your performance problems or why all interrupts go to one CPU. This message is for the ACPI(IO-APIC) maintainers to keep an eye on when there is new hardware. (<bf>Earle Nietzel</bf>)
<p>
To summarize the article found in official kernel documentation:
<enum>
<item> The "unexpected IO-APIC" is just an indicator that your motherboard is not on the whitelist.
<item> Cat your /proc/interrupts and if you see any line with IO-APIC then everything is fine because IO-APIC IRQ's are enabled.
</enum>
<item><bf>Do I need to do change MP from 1.4 to 1.1 and boot with (<bf>noapic</bf>) at the same time?</bf>
<p>
It depends.
<p>
I found that I do not need to turn off IO-APIC if I backed down from MP 1.4 and 1.1. Apparently some Xeon-based boards need to do both, but ASUS CUV4X boards do not. Turning off IO-APIC support needlessly imposes a probably small performance penalty on ASUS owners. (<bf>Vladimir G. Ivanovic</bf>)
<p>
Some IBM Netfinity machines will have problems initializing the onboard SCSI controller if MPS 1.1 is selected. Each possible LUB of each possible device on each possible bus will be queried with a timeout. Booting takes a uselessly long time. (<bf>E. Robert Bogusta</bf>)
<p>
There are reports that system with ASUS4X-DLS motherboard ran fine with IO-APIC enabled with MP 1.4.
<p>
For CUV4X-D motherboard, disabling the IDE controllers you probably can boot with MP 1.4 and APIC enabled.
<item><bf>Is there performance loss by running "noapic"?</bf>
<p>
(<bf>David Mentre</bf>) It has minor impact, except if you have high interrupt load (i.e., nearly nobody).
<item> <bf>My motherboard is an ASUS-CUV4X-DLS with the VIA 694XDP chipset. If I boot with the noapic flag, the machine boots fine and /proc/cpuinfo show sboth processors. However, /proc interrupts does not show any sharing of the interrupts.</bf>
<p>
Probably you need to upgrade your BIOS version to 1010.
<item> <bf>What are pros and cons of Xeons vs. Athlons?</bf>
<p>
Xeon's chipset (440GX) and accompanying motherboard (supermicro S2DGE) I'd be using is probably (much?) more reliable and well-supported under Linux SMP than Athlons' (AMD 760/760MP) simply because they've been around longer and through many more iterations.
<p>
Xeon's larger cache (1mb on the dual 400's I'm considering) might give performance enhancement (and given that I don't have only a single scientific code I'm planning to run on this, it's probably not helpful to test benchmark specifically for my code).
<p>
Athlon's significiantly has faster clock rate (along with full-speed L2 cache in Thunderbirds, although at only 384kb) and much higher memory bandwidth with PC2100 DDR memory could help a lot.
<p>
Cost is unclear until 760MP boards and PC2100 memory are released, but it will probably be ~$950 to get two 1GHz 385km L2 Thunderbirds, dual motherboard and 512mb of ECC PC2100 vs ~$750 to get two 400MHz 1mb L2 Xeons, dual motherboard and 512mb of ECC PC100. (<bf>Daniel Freedman</bf>)
<item><bf>My system locks up during heavy NFS traffic</bf>
<p>
Try the later 2.2.x kernels and the knfsd patches. This is
currently under investigation. (<bf>Wade Hampton</bf>)
<p>
<item> <bf>My system locks up with no oops messages</bf>
<p>
If you are using kernels 2.2.11 or 2.2.12, get the latest kernel. For
example 2.2.13 has a number of SMP fixes. Several people have reported
these kernels to be unstable for SMP. These same kernels may have NFS
problems that can cause lockups. Also, use a serial console to capture
your oops messages. (<bf>Wade Hampton</bf>)
<p>
If the problem remains (and the other suggestions on this list didn't
help either), then you could try the latest 2.3 kernels. They have more
verbose (and more robust) SMP/APIC code, and automatic
hard-lockup-prevention code which will produce meaningful oopses instead
of a silent hang. (<bf>Ingo Molnar</bf>)
<p>
(<bf>Osamu Aoki</bf>) You MUST also <em>disable</em> all BIOS related
power save features. Example of good configuration (Dual Celeron 466
Abit BP6):
<code>
POWER MANAGEMENT SETUP.
ACPI: Disabled
POWER MANAGEMENT: Disabled
PM CONTROL by APM: No
</code>
If power management features are activated, some random freeze can occur.
<item> <bf>Debugging lockups</bf>
<p>
(item by <bf>Wade Hampton</bf>)
<p>
A good means of debugging lockups is to get the ikd patch from
The SparcStation 10 and SparcStations 20 are SMP capable machine and according to the <url name="FAQABOSS" url="http://fagaboss.sunhelp.org"> the following combinations are known to work:
<itemize>
<item> 2xSM40 ( model 402 )
<item> 2xSM41 ( model 412 )
<item> 2xSM51 ( model 512 )
<item> 2xSM512 ( model 514 )
<item> 2xSM61 ( model 612 )
<item> 2xSM71 ( model 712 )
<item> 2xSM81 ( model 812 )
</itemize>
And, as stated earlier, CPU modules in SparcStations 10 and can run a different clock speeds, the following ones _SHOULD_ work:
<itemize>
<item> 2xSM50
<item> SM41, SM51
<item> SM41, SM61
<item> SM51, SM61
<item> SM71, SM81
</itemize>
How does it performs? Well, it is fast, really fast. Some of the java Demos can run faster on a dual HyperSparc 125Mhz 128MB ( ywing ) than on a dual celeron BP6 433@433Mhz 192MB ( calimero ). The same applies for the Gimp. When it comes to compiling calimero runs faster than ywing. Both computers running 2.2.16 kernel and calimero's hard disk subsystem is full SCSI.
<p>
One important detail when you plan to have different CPU modules in your computer is to have the same kind of modules, you cannot mix SuperSparc and HyperSparc for example, but you can have an odd number of CPUs, for example 3. They are said to be able to run modules at different clock speed as written in this article form AcesHardware , but I have not witnessed it. (<bf>Lionel, trollhunter Bouchpan-Lerus-Juery</bf>)
<sect1>Specific problem related to Sparc SMP support
<p>
(<bf>David Miller</bf>)
There should not be any worries.
The only known problem, and one we don't intend to fix, is that if you
build an SMP kernel for 32-bit (ie. non-ultrasparc) systems, this kernel
will not work on sun4c systems.
<sect>PowerPC architecture specific questions
<p>
<sect1>Which PPC machines are supported ?
<p>
<itemize>
<item> PowerSurge boards (including UMAX s900)
<item> PowerMac
<item> Motorola MTX: support under developement. Patches not yet
integrated into the main kernel (<bf>Troy Benjegerdes</bf>)
</itemize>
(<bf>Cort Dougan</bf>) Not supported: PPC RS/6000 systems
<sect1>Specific problem related to PPC SMP support
<p>
Nothing. Usual SMP compiling (see above). As usual, be aware, modules
are specific either for UP or SMP. Recompile them. (<bf>Paul
Mackerras</bf>)
<sect>Alpha architecture specific questions
<p>
<sect1>Which Alpha machines are supported ?
<p>
(<bf>Geerten Kuiper</bf>) SMP works for most, if not all, AXP servers.
(<bf>Jay A Estabrook</bf>) SMP does seem to work on most of our [Compaq]
boxes with 2 or more CPUs. That includes :
<itemize>
<item> AS2000/2100 (SABLE)
<item> AS4000/4100 (RAWHIDE)
<item> DS20 (DP264)
<item> GS320 (see the <url name="bootlog for a 31 CPUs machine"
url="http://lwn.net/daily/gs320.php3">)
</itemize>
It does not include :
<itemize>
<item> AS2100A (LYNX)
<item> TurboLaser bigboys (8200/8400)
</itemize>
(<bf>Alpha Processor Inc</bf>) SMP support has been qualified for all API
SMP systems starting from later 2.2-series kernels (approximately kernel
2.2.7).
At the time of writing, that is :
<itemize>
<item> DP264
<item> UP2000
</itemize>
See <url name="API's support website"
url="http://www.alpha-processor.com/support/index.shtml"> for more info.
<sect1>Specific problem related to Alpha SMP support
<p>
None (really ? :-)
<sect>Useful pointers
<p>
<sect1>Various
<p>
<itemize>
<item> <url name="Parallel Processing using Linux"